1. Field of the Invention
The present invention relates to a polishing apparatus, and more particularly to a polishing apparatus for polishing an object to be polished (substrate) such as a semiconductor wafer to a flat mirror finish.
2. Description of the Related Art
In recent years, high integration and high density in semiconductor device demands smaller and smaller wiring patterns or interconnections and also more and more interconnection layers. Multilayer interconnections in smaller circuits result in greater steps which reflect surface irregularities on lower interconnection layers. An increase in the number of interconnection layers makes film coating performance (step coverage) poor over stepped configurations of thin films. Therefore, better multilayer interconnections need to have the improved step coverage and proper surface planarization. Further, since the depth of focus of a photolithographic optical system is smaller with miniaturization of a photolithographic process, a surface of the semiconductor device needs to be planarized such that irregular steps on the surface of the semiconductor device will fall within the depth of focus.
Thus, in a manufacturing process of a semiconductor device, it increasingly becomes important to planarize a surface of the semiconductor device. One of the most important planarizing technologies is chemical mechanical polishing (CMP). Thus, there has been employed a chemical mechanical polishing apparatus for planarizing a surface of a semiconductor wafer. In the chemical mechanical polishing apparatus, while a polishing liquid containing abrasive particles such as silica (SiO2) therein is supplied onto a polishing surface such as a polishing pad, a substrate such as a semiconductor wafer is brought into sliding contact with the polishing surface, so that the substrate is polished.
This type of polishing apparatus includes a polishing table having a polishing surface formed by a polishing pad, and a substrate holding device, which is referred to as a top ring or a polishing head, for holding a substrate such as a semiconductor wafer. When a semiconductor wafer is polished with such a polishing apparatus, the semiconductor wafer is held and pressed against the polishing surface under a predetermined pressure by the substrate holding device. At this time, the polishing table and the substrate holding device are moved relative to each other to bring the semiconductor wafer into sliding contact with the polishing surface, so that the surface of the semiconductor wafer is polished to a flat mirror finish.
In such polishing apparatus, if the relative pressing force applied between the semiconductor wafer, being polished, and the polishing surface of the polishing pad is not uniform over the entire surface of the semiconductor wafer, then the surface of the semiconductor wafer is polished insufficiently or excessively in different regions thereof depending on the pressing force applied thereto. It has been customary to uniformize the pressing force applied to the semiconductor wafer by providing a pressure chamber formed by an elastic membrane at the lower portion of the substrate holding device and supplying the pressure chamber with a fluid such as air to press the semiconductor wafer under a fluid pressure through the elastic membrane.
If the polishing apparatus polishes semiconductor wafers with a polishing pad made of synthetic resin, then the polishing pad is progressively worn each time it is dressed and with the passage of time. In order to keep the surface pressure distribution unchanged on the semiconductor wafer held by the top ring or the polishing head, it is necessary to keep the distance between the top ring or the polishing head and the polishing pad constant during polishing.
According to a polishing apparatus disclosed in Japanese laid-open patent publication No. 2004-154933, a polishing head holding a substrate such as a semiconductor wafer is lowered to bring the polishing head and a surface, to be polished, of the substrate into contact with a polishing pad. When the lower surface of a subcarrier (chucking plate) in the polishing head contacts the upper surface of an elastic membrane, the vertical position (height) of the polishing head is detected by a sensor, and the polishing head is lifted by a predetermined distance from the detected vertical position to keep the distance between the lower surface of the subcarrier and the upper surface of the elastic membrane, i.e., the distance between the lower surface of the subcarrier and the polishing pad constant. The sensor for detecting the vertical position of the polishing head is mounted on a shaft to which the polishing head is fixed, and a stopper is mounted on a support arm (fixed member) which holds the polishing head in its entirety. The sensor detects the vertical position (height) of the polishing head by detecting the distance between the sensor and the stopper.
According to a polishing apparatus disclosed in Japanese laid-open patent publication No. 2006-128582, a top ring holding a semiconductor wafer is lowered until the lower surface of the top ring is brought into contact with the polishing surface of a polishing pad, whereupon the position of the top ring is detected by a sensor or the like, and then the vertical position of the polishing surface of the polishing pad is grasped from the detected position of the top ring. This process is referred to as pad search. An optimum position for the top ring to take at the time of polishing is calculated from the grasped vertical position of the polishing surface. Since the polishing pad is worn because of prior polishing and dressing, the amount of wear of the polishing pad is measured and an optimum vertical position for the top ring to take at the time of polishing is calculated from the measured amount of wear of the polishing pad. A servomotor for lifting and lowering the top ring is energized to lower the top ring, and then de-energized when the top ring reaches the calculated optimum vertical position. In this manner, the top ring is controlled to keep the distance between the top ring and the polishing surface of the polishing pad constant.
In the polishing apparatus disclosed in Japanese laid-open patent publication No. 2004-154933, in order to keep the distance between the lower surface of the subcarrier and the upper surface of the elastic membrane, i.e., the distance between the lower surface of the subcarrier and the polishing pad constant, it is necessary prior to the polishing process to lower the polishing head holding the substrate to bring the polishing head and the surface, to be polished, of the substrate into contact with the polishing pad, measure the vertical position of the polishing head as the polishing head is into contact with the polishing pad, and then lift the polishing head by a predetermined distance. The time required to bring the polishing head into contact with the polishing pad and then lift the polishing head increases the overall polishing time of the polishing process, resulting in lowering the throughput of the polishing apparatus.
In the polishing apparatus disclosed in Japanese laid-open patent publication No. 2006-128582, the pad search in which the top ring holding the semiconductor wafer is lowered until the lower surface of the top ring is brought into contact with the polishing surface of the polishing pad, whereupon the position of the top ring is detected by the sensor, and then the vertical position of the polishing surface of the polishing pad is grasped from the detected position of the top ring is carried out. After the pad search, an optimum position for the top ring to take at the time of polishing is calculated from the grasped vertical position of the polishing surface. Since the polishing pad is worn because of prior polishing and dressing, the amount of wear of the polishing pad is measured and an optimum vertical position for the top ring to take in the polishing process is calculated from the measured amount of wear of the polishing pad. Based on the calculated optimum vertical position, the distance between the top ring and the polishing surface of the polishing pad is controlled so as to be constant. The time required to control the vertical position of the top ring before the polishing process is much shorter than with the polishing apparatus disclosed in Japanese laid-open patent publication No. 2004-154933. The applicant of the present application has employed a process of calculating and controlling an optimum vertical position for the top ring prior to the polishing process based on the amount of wear of the polishing pad. As the polishing apparatus is continuously operated to polish an increased number of substrates and the accumulated polishing time increases, the polishing profile of substrates changes.
The inventors of the present invention have conducted various experiments and analyzed the experimental results for the purpose of finding out why the polishing profile of substrates changes during the continuous operation of the polishing apparatus. As a result, it has been discovered that a top ring shaft for holding the top ring and lifting and lowering the top ring tends to extend due to a temperature rise caused by the friction of a rotational holding portion, and thus the top ring is located at a position lower than the optimum vertical position of the top ring which has been calculated.
In both of the polishing apparatus disclosed in Japanese laid-open patent publication No. 2004-154933 and the polishing apparatus disclosed in Japanese laid-open patent publication No. 2006-128582, the pad search is carried out to bring the polishing head or the top ring holding the semiconductor wafer into contact with the polishing pad for obtaining an optimum vertical position (preset polishing position) of the polishing head or the top ring in the polishing process. During the pad search, the semiconductor wafer and the subcarrier (chucking plate) tend to contact each other through the elastic membrane. At this time, since a force of about 1500 N at maximum is applied to a local area of the semiconductor wafer, devices fabricated on the semiconductor wafer may possibly be damaged or broken.
Specifically, the top ring shaft for lifting and lowering the top ring or the polishing head is actuated by a ball screw, a motor, and gears for precision feeding. Therefore, the gears, the ball screw, and other mechanical parts tend to cause a large mechanical loss. When the top ring shaft is actuated for precision feeding, a certain torque limit is imposed on the motor. However, if the motor is operated at a low torque to feed the top ring shaft, then the motor may stall due to an instantaneous large mechanical loss. The torque range for reliably feeding the top ring shaft is from about 25% to 30% of the maximum torque value of the motor. When the top ring is brought into contact with the polishing pad while the top ring shaft is being fed under a motor torque which is 30% of the maximum torque value, a load of about 1500 N at maximum is imposed on the top ring shaft. Unlike application of uniform pressure to the semiconductor wafer by the pressure chamber formed by the elastic membrane, this load is applied to a local area of the semiconductor wafer as a product wafer, rather than its entire surface. Thus, devices fabricated on the semiconductor wafer are likely to be broken by this load. In order to prevent such device damage, a dummy wafer may be used instead of the product wafer when the polishing head or the top ring is brought into contact with the polishing pad. However, it needs extra work to install the dummy wafer on the polishing head or the top ring and de-install the dummy wafer from the polishing head or the top ring, and the extra work is responsible for reducing the throughput. Accordingly, there is a demand for a polishing apparatus which minimizes the pad search for determining an optimum vertical position of the polishing head or the top ring at the time of polishing.